Hello all,
I've an AS5300 with 8 Channelized E1/PRI ports (Quad Cards With 4 Serial Interfaces) using the following firmwares :
- c5300-is-mz.122-2.XA.bin
- mica-modem-pw.2.9.4.0.bin
I wonder if I can configure the E1 controller as unframed E1 "channel-group 0 unframed " because I tried to do it and It says: "% Invalid input detected at '^' marker."
Does the firmware and the E1/PRI Card support that ? if the problem is any or both firmware version, which one should be used. if it's the E1/PRI card doesn't support it which card is the adequate solution
Thanks a Lot
Following the version on the AS5300: nas-AS5300# sh ver Cisco Internetwork Operating System Software IOS (tm) 5300 Software (C5300-IS-M), Version 12.2(2)XA, EARLY DEPLOYMENT RELEASE SOFTWARE (fc1) TAC:Home:SW:IOS:Specials for info Copyright (c) 1986-2001 by cisco Systems, Inc. Compiled Wed 27-Jun-01 01:27 by hwcheng Image text-base: 0x600089B0, data-base: 0x61034000
ROM: System Bootstrap, Version 12.0(2)XD1, EARLY DEPLOYMENT RELEASE SOFTWARE (fc1) BOOTFLASH: 5300 Software (C5300-BOOT-M), Version 12.0(4)T1, RELEASE SOFTWARE (fc1)
nas-AS5300 uptime is 1 week, 3 days, 9 hours, 55 minutes System returned to ROM by reload at 00:11:02 UTC Sat Jan 1 2000 System image file is "flash:c5300-is-mz.122-2.XA.bin"
cisco AS5300 (R4K) processor (revision A.32) with 131072K/16384K bytes of memory. Processor board ID 24709928 R4700 CPU at 150Mhz, Implementation 33, Rev 1.0, 512KB L2 Cache Channelized E1, Version 1.0. Bridging software. X.25 software, Version 3.0.0. SuperLAT software (copyright 1990 by Meridian Technology Corp). Primary Rate ISDN software, Version 1.1. Backplane revision 2 Manufacture Cookie Info: EEPROM Type 0x0001, EEPROM Version 0x01, Board ID 0x30, Board Hardware Version 3.2, Item Number 800-2544-04, Board Revision B0, Serial Number 24709928, PLD/ISP Version 0.0, Manufacture Date 25-Feb-2001.
1 Ethernet/IEEE 802.3 interface(s) 1 FastEthernet/IEEE 802.3 interface(s) 9 Serial network interface(s) 120 terminal line(s) 8 Channelized E1/PRI port(s) 128K bytes of non-volatile configuration memory. 16384K bytes of processor board System flash (Read/Write) 8192K bytes of processor board Boot flash (Read/Write)