10/100 Ethernet Differential Pairs PCB Trace Length

How close can you maintain impedance and balance?

That would seem to depend on the tolerance of the PCB processing.

-- glen

I would also be very concerned about the signals on the nearby traces. Crudely seen, it is like having 8-9 inches of untwisted parallel conductors. 100 only really tolerates 0.5 inch, and those 8-9 inches might pick up excessive crosstalk.

I believe the usual layout solution is to use lots of vias to essentially twist the traces. Have to be careful about the impedence discontinuities.

-- Robert

To maintain 100 ohms the traces will be pretty close together, so nearby has to be pretty close to bother it. Probably best to put the transformer as close as possible to the connector, I am not sure if that is what the OP meant.

On PCB scale I don't believe that twist is so important, and the extra vias will create extra impedance discontinuities. Keeping balance means equal distance to anything else nearby, so it is best that there not be anything sufficiently nearby.

-- glen

The transformers are next to connector, however the PHYs are on the opposite side of the board about 8" away. The pairs will be internally routed to the transformers, how far away do these lines have to be to avoid crosstalk? The board has a cpu, memory and fpga all running >100Mhz, theses devices sit in the middle of the board above the pair lines.

Thanks for the help.

GG

glen herrmannsfeldt wrote in part:

I'm beyond my direct expertise here, but I was thinking these traces would be running parallel to bus[ses] at 100 MHz on fairly tight spacing -- maybe 0.100 gap. As such, I can see plenty of unbalanced crosstalk on 0.030 trace spacing, 70% more on the closest.

Of course the vias are ugly, expensive and have to be minimized. But how else to balance the crosstalk between the paired conductors? I don't think anything nearly like the 6 per inch twist rate in Cat5e has to be maintained.

IMHO 6/in overkill and mostly to allow more twist slew so the pairs don't xt). I was thinking in the controlled PCB environment that 4 per run parallel to a given radiator or not more than 2/in would be enough.

-- Robert

I have had very good success running the pairs on an *internal* layer of the board, with ground plane both above and below the pairs, and ground traces alongside and between the pairs (but not between the individual traces of a single pair). This essentially creates a short shielded parallel line, greatly reducing crosstalk without the need for "twisting". It also eliminates coupling from other high-frequency circuitry on the board.

Make sure to design the trace width/spacing such that proper impedance is maintained, taking into account the ground planes (which will tend to lower the impedance from a "free space" model).

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