Hi!
I'v started reading G.70x and Q.70x in order to learn a little bit about SS7 networks, however I have still one issue open:
Each E1 frame consists of 32*8 bits. In most cases timeslot 16 is used for common channel signaling. However I can't find information about how are SS7 frames embedded in E1 frames.
Is it like this, that bits from time slot 16 from each E1 frame should simply be treated as continous bit stream, and HDLC framing should be used on this bit stream ? And this means that MTP1 frame boundries can fall somewhere in the middle of time slot bits, and it is perfectly ok (as HDLC frames may have a length that is not a multiple of 8), right ?
Best Regards, Przemyslaw