I'm implementing MDIO/MDC interface with GPIO pins on a microcontroller (i.e. one pin for MDIO line, and the other is for clock). I have read its description in IEEE document and mainly it seems to be clear to me, except a few details.
So, if consider behavior of MDIO/MDC lines over GPIO, I don't understand how will the MDC act if at some moment of time the clock's period, and hence the clock's frequency, changes (say, an interrupt has triggered), and it's not constant throughout data transmission ? Does it violate the standard?
On the other hand, MDIO data are sampled on a rising edge of clock -- then this condition means it doesn't matter what the clock's period will be, the more important is that the data are synchronized with it.
So, at this moment I am confused. Would appreciate any comments!