Have a question or want to start a discussion? Post it! No Registration Necessary. Now with pictures!
May 31, 2010, 1:07 am
rate this thread
[ I beleive this is proper groups to ask such question. ]
I'm implementing MDIO/MDC interface with GPIO pins on a microcontroller
(i.e. one pin for MDIO line, and the other is for clock). I have read its
description in IEEE document and mainly it seems to be clear to me, except a
So, if consider behavior of MDIO/MDC lines over GPIO, I don't understand how
will the MDC act if at some moment of time the clock's period, and hence the
clock's frequency, changes (say, an interrupt has triggered), and it's not
constant throughout data transmission ? Does it violate the standard?
On the other hand, MDIO data are sampled on a rising edge of clock -- then
this condition means it doesn't matter what the clock's period will be, the
more important is that the data are synchronized with it.
So, at this moment I am confused.
Would appreciate any comments!
- » NYC local event: UNIGROUP meeting Thur 16-MAR-2017: DataCenter Structured ...
- — Newest thread in » Ethernet LAN
- » Sprint says Verizon customers aren't very smart [telecom]
- — The site's Newest Thread. Posted in » General Telecommunications Forum