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Posted by James Ma on February 10, 2006, 9:38 pm
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Use multiple Ethernet MACs + your analysis logic in a FPGA to make a
full wire speed network analyzer or packet generator .
Simple & easy. No driver programming.
Direct program control of FPGA state machines, registers & memories.
No TCP/IP/UDP needed.
Low gate count & low cost, no royalties.
www.chipenet.com
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