Re: FET basics
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Posted by Andrew Holme on January 24, 2007, 2:26 pm
Please log in for more thread options It works both ways. You can force Id to 1mA and let Vg find its own level. You can force one, or the other, but not both at the same time! | |||||||||||||||||||
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Posted by vic on January 24, 2007, 2:57 pm
Please log in for more thread options Andrew Holme wrote: >> Second, various online lessons I've found about FETs say that Ids is a
>> function of Vgs. Here Ids is fixed by TR3, so what is varying ? >
> It works both ways. You can force Id to 1mA and let Vg find its own level. > You can force one, or the other, but not both at the same time! OK, I was not sure it worked both ways. Ids is fixed, so Vgs is fixed too. Does this mean that when Vg varies, Vs varies accordingly ? I still don't get how the signal is transmitted to the next stage of the amplifier, which is wired to a point where voltage and current seem constant :) vic. | |||||||||||||||||||
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Posted by Andrew Holme on January 24, 2007, 3:14 pm
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> Andrew Holme wrote:
>>> Second, various online lessons I've found about FETs say that Ids is a
>>> function of Vgs. Here Ids is fixed by TR3, so what is varying ? >>
>> It works both ways. You can force Id to 1mA and let Vg find its own >> level. You can force one, or the other, but not both at the same time! >
> OK, I was not sure it worked both ways. Ids is fixed, so Vgs is fixed too. > Does this mean that when Vg varies, Vs varies accordingly ? It would if C5 was not there. > I still don't get how the signal is transmitted to the next stage of the
> amplifier, which is wired to a point where voltage and current seem > constant :) > > vic. OK, what we've discussed so far applies to the DC biasing conditions. For AC, things are different. Capacitor C5 prevents Vg varying at signal frequencies. So, Vgs and Id both vary at signal frequencies. | |||||||||||||||||||
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Posted by John Popelish on January 24, 2007, 6:47 pm
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vic wrote: > Andrew Holme wrote:
>>> Second, various online lessons I've found about FETs say that Ids is
>>> a function of Vgs. Here Ids is fixed by TR3, so what is varying ? >>
>> It works both ways. You can force Id to 1mA and let Vg find its own >> level. You can force one, or the other, but not both at the same time! >
> OK, I was not sure it worked both ways. Ids is fixed, so Vgs is fixed > too. Does this mean that when Vg varies, Vs varies accordingly ? > > I still don't get how the signal is transmitted to the next stage of the > amplifier, which is wired to a point where voltage and current seem > constant :) The fet current is constant, only on average. The capacitor across TR3 bypasses the AC signal current around the suurce bias current regulator. | |||||||||||||||||||
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>
> I'm studying the input stage of the following frequency meter :
> http://www.madlab.org/kits/FrequencyMeter.pdf
> http://www.madlab.org/kits/frqmeter.html
>
> I'm having a little trouble understanding how the FET works.
>
> First, the polarization of the transistor.
> To operate, Vg must be lower than Vs.
> Let's say there is no input signal so Vg = 5*2.2k/12.2k = 0.9V.
> TR3 is wired as constant current source, so Ids is fixed = 1mA.
> There is also 1mA through R1, so Vd = 5-1k*1mA = 4V.
> From there, I don't see how it can be sure that Vs > Vg. Vds seems
> indeterminate at this point. Is he just assuming that Vds always is lower
> than 3.1V ?
>
> Second, various online lessons I've found about FETs say that Ids is a
> function of Vgs. Here Ids is fixed by TR3, so what is varying ?
>