Attenuation of op-amp gain
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Posted by Dave Boland on March 31, 2005, 3:53 am
Please log in for more thread options A design I'm doing uses and ADC with a 2.5 volt reference. The ADC if buffered with a voltage follower. The problem is that some of the signals are >2.5 volts, and have an Rout of
10K or more. At first thought one would use a voltage
divider with high resistance values (x10**6 ohms)in front of the op-amp. The problems with that are that it increases the resistor noise and the Rin varies with each attenuation setting (0-2.5v, 0-5v, 0-12v, 0-50v). Any good ideas on a simple way to do this and keep a relatively constant Rin at 10M or more? Thanks, Dave | ||||||||||||||||||||||||||||||||||||||||
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Posted by Larry Brasfield on March 30, 2005, 9:24 pm
Please log in for more thread options >A design I'm doing uses and ADC with a 2.5 volt reference. The ADC if buffered
with a voltage follower. The problem is that some
>of the signals are >2.5 volts, and have an Rout of 10K or more. At first
thought one would use a voltage divider with high
>resistance values (x10**6 ohms)in front of the op-amp. The problems with that
are that it increases the resistor noise and the Rin
>varies with each attenuation setting (0-2.5v, 0-5v, 0-12v, 0-50v). Any good
ideas on a simple way to do this and keep a relatively
>constant Rin at 10M or more?
What are your requirements w.r.t. frequency response and accuracy? How many bits are you converting and what are you doing now about anti-aliasing? What is the expected range of source impedance? Is there a big cost concern, or can performance drive the design? The answers to your question will depend on such facts. -- --Larry Brasfield email: donotspam_larry_brasfield@hotmail.com Above views may belong only to me. | ||||||||||||||||||||||||||||||||||||||||
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Posted by Fred Bloggs on March 31, 2005, 7:59 am
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Larry Brasfield wrote: >
>>A design I'm doing uses and ADC with a 2.5 volt reference. The ADC if buffered
with a voltage follower. The problem is that some
>>of the signals are >2.5 volts, and have an Rout of 10K or more. At first
thought one would use a voltage divider with high
>>resistance values (x10**6 ohms)in front of the op-amp. The problems with that
are that it increases the resistor noise and the Rin
>>varies with each attenuation setting (0-2.5v, 0-5v, 0-12v, 0-50v). Any good
ideas on a simple way to do this and keep a relatively
>>constant Rin at 10M or more?
>
> > > What are your requirements w.r.t. frequency response > and accuracy? How many bits are you converting and > what are you doing now about anti-aliasing? What is > the expected range of source impedance? Is there a > big cost concern, or can performance drive the design? > The answers to your question will depend on such facts. > His answers to those questions will not influence the outcome of receiving useful information from you that can be applied to anything, they will only lead to more questions and generalistic bs from you. You're so dumb, you can't even so much as outline a simple constant input impedance attenuator. | ||||||||||||||||||||||||||||||||||||||||
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Posted by John Woodgate on March 31, 2005, 9:25 am
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I read in sci.electronics.design that Dave Boland gain', on Thu, 31 Mar 2005: >A design I'm doing uses and ADC with a 2.5 volt reference. The ADC if
Buffer the high-impedance signals individually and attenuate the buffer
>buffered with a voltage follower. The problem is that some of the >signals are >2.5 volts, and have an Rout of 10K or more. At first >thought one would use a voltage divider with high resistance values >(x10**6 ohms)in front of the op-amp. The problems with that are that >it increases the resistor noise and the Rin varies with each >attenuation setting (0-2.5v, 0-5v, 0-12v, 0-50v). Any good ideas on a >simple way to do this and keep a relatively constant Rin at 10M or more? > outputs? No high impedance input required. -- Regards, John Woodgate, OOO - Own Opinions Only. There are two sides to every question, except 'What is a Moebius strip?' http://www.jmwa.demon.co.uk Also see http://www.isce.org.uk | ||||||||||||||||||||||||||||||||||||||||
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Posted by Dave Boland on March 31, 2005, 4:31 pm
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Dave Boland wrote: > A design I'm doing uses and ADC with a 2.5 volt reference. The ADC if
> buffered with a voltage follower. The problem is that some of the > signals are >2.5 volts, and have an Rout of 10K or more. At first > thought one would use a voltage divider with high resistance values > (x10**6 ohms)in front of the op-amp. The problems with that are that it > increases the resistor noise and the Rin varies with each attenuation > setting (0-2.5v, 0-5v, 0-12v, 0-50v). Any good ideas on a simple way to > do this and keep a relatively constant Rin at 10M or more? > > Thanks, > Dave > Oh my, it looks like I've stepped into a hornets nest. Didn't mean to start an argument! The system runs under a RTOS, and the fastest readings are 500uS. The accuracy should be better than 1%, and yes there is a filter between the op-amp and the ADC. Perhaps thinking of this as an intelligent DVM would be helpful. I looked for DVM schematics and the only on I found was for the Intersil chip. I'll spend some more time on this later this afternoon. I have seen some designs where the Rf/Ri for an op-amp stage was less than one, making the gain less than one. I have not been able to find the design or the part (op-amp). The op-amps I have seen so far are not stable for gains less than 1. Thanks for the help so far. Dave, | ||||||||||||||||||||||||||||||||||||||||
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