pcb.sourceforge.net: increasing clearance
Bookmark this page:
 Yahoo!
 Google
 Windows Live
 del.icio.us
 digg
 Netscape
|
|
|||||||||||||
|
Posted by samster on June 16, 2007, 8:20 am
Please log in for more thread options quick question to any "pcb" users (open source geda tools): I have a layout completed and I tried to create a copper pour with the "rectangle" function but realized that my default clearance of 10 mil (traces) is wayyy too small. I believe its possible to change this individually (by clicking on each trace) but is there a way to change this setting FOR ALL TRACES at once? do I have to edit the layout file under VIM or is there an easier way? thanks | |||||||||||||
|
Posted by DJ Delorie on June 16, 2007, 9:06 am
Please log in for more thread options Select -> Select All Objects
:ChangeClearSize(selected,+10,mil) :ChangeClearSize(selected,=2,mm) The command line window (":") allows a lot of flexibility, but you need to read the "Action Reference" appendix of the manual to know what to type in. http://pcb.sourceforge.net/pcb-cvs/pcb.html#Action%20Reference http://pcb.sourceforge.net/pcb-cvs/pcb.html#ChangeClearSize%20Action Note that pcb's plugin system hooks into the command line, so if you need something that's not already there, it's pretty easy to write a new module, put it in ~/.pcb, and invoke it from the command window. | |||||||||||||
|
Posted by samster on June 16, 2007, 9:06 am
Please log in for more thread options
On Sat, 16 Jun 2007 09:06:57 -0400, DJ Delorie wrote: >
>> I believe its possible to change this individually (by clicking on each
>> trace) but is there a way to change this setting FOR ALL TRACES at once? >> do I have to edit the layout file under VIM or is there an easier way? >
> Select -> Select All Objects > > :ChangeClearSize(selected,+10,mil) > :ChangeClearSize(selected,=2,mm) thanks man. I read about this briefly some months back. After post, I am going now reread that section of the manual. | |||||||||||||
| Similar Threads | Posted |
| pcb.sourceforge.net: increasing clearance | June 16, 2007, 8:20 am |
| increasing number of frequency digits in AC analysis in spice 2G6 | March 5, 2007, 7:20 am |
| Board outline clearance | August 31, 2004, 12:32 pm |
| Protel 99SE "clearance constraint" in DRC | July 14, 2004, 4:48 am |
> trace) but is there a way to change this setting FOR ALL TRACES at once?
> do I have to edit the layout file under VIM or is there an easier way?