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Posted by John Larkin on January 29, 2008, 12:00 pm
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On Mon, 28 Jan 2008 23:00:28 -0800 (PST), Sol_HSA
>As the final project in my school, I'm building a real-time logic
>simulator called Atanua. It's available from:
>
>http://iki.fi/sol/atanua.html
>
>Although it's a pure ideal-component logic simulator (not SPICE), it's
>rather functional. The workflow for trying out different
>configurations is pretty optimized, and the whole point is to be a
>rather 'lightweight' tool for learning logic components.
>
>I'm trying to do daily releases of it, building a part or two a day
>while working full time, but as of this writing the simulated parts
>include:
>
>Base parts list:
>
> * Logic '0' (ground) and '1' (vcc)
> * Logic AND, OR, NAND, NOR, XOR and NOT gates, in both US and
>Finnish symbols
> * SR-latch (NOR and NAND versions), Synchronized SR-latch, D-
>latch, T-latch, JK-latch
> * JK-flipflop, D-flipflop, T-flipflop, SR-flipflop
> * 2-bit MUX block, 3-bit DX-block
> * Synchronized clock generators (0.1Hz, 0.2Hz, 0.5Hz, 1Hz, 2Hz,
>5Hz, 10Hz, 20Hz, 50Hz, 100Hz, 200Hz, 500Hz)
> * Labels
>
>Chips list:
>
> * 7400 - Quad 2-input NAND Gate
> * 7402 - Quad 2-input NOR Gate
> * 7404 - Hex Inverter
> * 7408 - Quad 2-input AND Gate
> * 7410 - Triple 3-input NAND Gate
> * 7420 - Dual 4-input NAND Gate
> * 7432 - Quad 2-input OR Gate
> * 7447 - BCD to 7-segment Decoder/Driver
> * 7473 - 7473: Dual J-K Flip-Flop with Clear
> * 7474 - 7474: Dual D Positive Edge Triggered Flip-Flop with
>Preset and Clear
> * 7485 - 4-bit Magnitude Comparator
> * 7486 - Quad 2-input XOR Gate
> * 7490 - Decade Counter (separate Divide-by-2 and Divide-by-5
>sections)
> * 74138 - 3 to 8-line Decoder/Demultiplexer
> * 74139 - Dual 2 to 4-line Decoder/Demultiplexer
> * 74151 - 8-Line to 1-Line Data Selector/Multiplexer
> * 74195 - 4-bit Parallel-Access Shift Register
> * 74163 - Synchronous 4-bit Binary Counter with Synchronous Clear
> * 74164 - 8-bit Parallel-Out Serial Shift Register with
>Asynchronous Clear
> * 74283 - 4-bit Binary Full Adder
> * 74574 - Octal D-Type Edge-Triggered Flip-Flop with Three-State
>Outputs
>
>I/O parts list:
>
> * LEDs (red, green, blue, cyan, magenta, yellow, white)
> * 7-segment displays in same colors, normal and inverted
> * Keyboard keys (0,1,2...9, a,b,c...z)
>
>If you take it for a spin, please send me mail about your experiences!
>Many of the features I've implemented are result of user feedback.
Real-time? That's impressive. How fast a PC do I need to run, say, a
16-bit PWM generator at 30 MHz?
John
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Posted by John Fields on January 30, 2008, 6:53 am
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On Wed, 30 Jan 2008 02:57:43 -0800 (PST), Sol_HSA
>On Jan 29, 7:00 pm, John Larkin
>> On Mon, 28 Jan 2008 23:00:28 -0800 (PST), Sol_HSA
>> >As the final project in my school, I'm building a real-time logic
>> >simulator calledAtanua. It's available from:
>> >
>> >http://iki.fi/sol/atanua.html
>>
>[chop]
>> Real-time? That's impressive. How fast a PC do I need to run, say, a
>> 16-bit PWM generator at 30 MHz?
>>
>> John
>
>Heh, I did not state the fact that the simulation clock runs at 1kHz.
---
Then it's not running real-time, is it?
--
JF
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Posted by David Harmon on January 30, 2008, 1:05 pm
Please log in for more thread options On Tue, 29 Jan 2008 09:00:10 -0800 in sci.electronics.basics, John
>Real-time? That's impressive. How fast a PC do I need to run, say, a
>16-bit PWM generator at 30 MHz?
It doesn't matter how fast your PC is. Of course it will be a
simulated 30 Mhz. He didn't say it was an Emulator, just a
Simulator.
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Posted by John Larkin on January 30, 2008, 10:35 pm
Please log in for more thread options wrote:
>On Tue, 29 Jan 2008 09:00:10 -0800 in sci.electronics.basics, John
>>Real-time? That's impressive. How fast a PC do I need to run, say, a
>>16-bit PWM generator at 30 MHz?
>
>It doesn't matter how fast your PC is. Of course it will be a
>simulated 30 Mhz.
Then it won't be real-time.
John
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>simulator called Atanua. It's available from:
>
>http://iki.fi/sol/atanua.html
>
>Although it's a pure ideal-component logic simulator (not SPICE), it's
>rather functional. The workflow for trying out different
>configurations is pretty optimized, and the whole point is to be a
>rather 'lightweight' tool for learning logic components.
>
>I'm trying to do daily releases of it, building a part or two a day
>while working full time, but as of this writing the simulated parts
>include:
>
>Base parts list:
>
> * Logic '0' (ground) and '1' (vcc)
> * Logic AND, OR, NAND, NOR, XOR and NOT gates, in both US and
>Finnish symbols
> * SR-latch (NOR and NAND versions), Synchronized SR-latch, D-
>latch, T-latch, JK-latch
> * JK-flipflop, D-flipflop, T-flipflop, SR-flipflop
> * 2-bit MUX block, 3-bit DX-block
> * Synchronized clock generators (0.1Hz, 0.2Hz, 0.5Hz, 1Hz, 2Hz,
>5Hz, 10Hz, 20Hz, 50Hz, 100Hz, 200Hz, 500Hz)
> * Labels
>
>Chips list:
>
> * 7400 - Quad 2-input NAND Gate
> * 7402 - Quad 2-input NOR Gate
> * 7404 - Hex Inverter
> * 7408 - Quad 2-input AND Gate
> * 7410 - Triple 3-input NAND Gate
> * 7420 - Dual 4-input NAND Gate
> * 7432 - Quad 2-input OR Gate
> * 7447 - BCD to 7-segment Decoder/Driver
> * 7473 - 7473: Dual J-K Flip-Flop with Clear
> * 7474 - 7474: Dual D Positive Edge Triggered Flip-Flop with
>Preset and Clear
> * 7485 - 4-bit Magnitude Comparator
> * 7486 - Quad 2-input XOR Gate
> * 7490 - Decade Counter (separate Divide-by-2 and Divide-by-5
>sections)
> * 74138 - 3 to 8-line Decoder/Demultiplexer
> * 74139 - Dual 2 to 4-line Decoder/Demultiplexer
> * 74151 - 8-Line to 1-Line Data Selector/Multiplexer
> * 74195 - 4-bit Parallel-Access Shift Register
> * 74163 - Synchronous 4-bit Binary Counter with Synchronous Clear
> * 74164 - 8-bit Parallel-Out Serial Shift Register with
>Asynchronous Clear
> * 74283 - 4-bit Binary Full Adder
> * 74574 - Octal D-Type Edge-Triggered Flip-Flop with Three-State
>Outputs
>
>I/O parts list:
>
> * LEDs (red, green, blue, cyan, magenta, yellow, white)
> * 7-segment displays in same colors, normal and inverted
> * Keyboard keys (0,1,2...9, a,b,c...z)
>
>If you take it for a spin, please send me mail about your experiences!
>Many of the features I've implemented are result of user feedback.