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Posted by wisdomchina on April 24, 2008, 10:05 pm
Please log in for more thread options This read-only bit allows emulation of the “STOP disable” mask option on the MC68HC05C12A. (See 5.10 COP During Stop Mode.) If configured in MC68HC05C9A mode, this bit has no effect and will be forced to 0 regardless of the programmed state.1 = If the MCU enters stop mode, the clock monitor is enabled to force a system reset0 = STOP instruction executed as normal C12COPE — C12A COP Enable Bit This read-only bit enables the COP function when configured in MC68HC05C12A mode. If configured in MC68HC05C9A mode, this bit has no effect and will be forced to 0 regardless of the programmed state.1 = When in C12A mode, this enables the C12ACOP watchdog timer.0 = When in C12A mode, this disables the C12ACOP watchdog timer.SEC — Security Enable BitThis read-only bit enables the EPROM security feature. Onceprogrammed, this bit helps to prevent external access to the programmed EPROM data. The EPROM data cannot be verified or modified. 1 = Security enabled 0 = Security disabled NOTE: During power-on reset, the device always will be configured as MC68HC05C9A regardless of the state of the C12A bit. Freescale Semiconductor, Inc. article from http://www.chinaicmart.com/suppliers/623/MC68HC705C9ACFN.html -- Message posted using http://www.talkaboutelectronicequipment.com/group/sci.electronics.cad/ More information at http://www.talkaboutelectronicequipment.com/faq.html | ||||||||||
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IC parts MC68HC705C9ACFN description
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